Question

Direct reset MOD 12 synchronous down counter circuit
Designed using falling edge trigger SR FF
It is desirable. A, B, C, and D FFs in the circuit to be designed
It will be used. Here the highest-valued output is considered A
It will be. When this design is done, only SA and RA of A FF
after doing logic functions to be applied to their inputs
then write in the fields below. (Counter circuit design
write the steps in the empty space below. Without a solution
the responses will not be accepted. )

Answer 1