Question

Design a sequential traffic light controller for the intersection of street A and street B. Each street has traffic sensors which detect the presence of vehicles approaching or stopped at intersection.

Sa=1 means a vehicle is approaching on street A.

Sb=1 means a vehicle is approaching on street B.

There are 3 outputs of each streets RedA, YellowA and GreenA, RedB, YellowB, and GreenB.

Condition: “StreetA” is a main street and has a green light for at least 50s, after 50s if there is a car approaches on “StreetB”, the light changed to yellow then red and “StreetB” has green light for 50s.

At the end of 50s, the light change back unless there is a car on “StreetB” and none on “StreetA”

Present the code and develop a waveform using the Quartus Prime 19.1 Lite edition.

Answer 1

library ieee;

use ieee.std_logic_1164.all;

entity traffic_light is port (clk, sa, sb: in bit; ra, rb, ga, gb, ya, yb: inout bit);

end traffic_light;

architecture behave of traffic_light is signal state, nextstate: integer range 0 to 12;

type light is (r, y, g);

signal lighta, lightb: light;

begin

process(state, sa, sb)

begin

ra<='0'; rb<='0';ga<='0'; gb<='0'; ya<='0'; yb <= '0';

case state is

when 0 to 4 => ga <='1';rb <= '1'; '; nextstate <= state+1;

when 5=>ga<='1';rb<='1';if sb='1' then nextstate<=6;end if;

when 6 => ya <= '1'; rb <= '1'; nextstate <= 7;

when 7 to 10 => ra <= '1'; gb <= '1'; nextstate<=state+1;

when 11 => ra <= '1'; gb <= '1';

if (sa='1' or sb='0') then nextstate <=12; end if;

when 12 => ra <= '1'; yb <= '1'; nextstate <= 0;

end case;

end process;

process(clk)

begin

if clk = '1' then state <= nextstate; end if;

end process;

lighta <= r when ra='1' else y when ya='1' else g when ga='1';

lightb <= r when rb='1' else y when yb='1' else g when gb='1';

end behave;