Question

A cell phone performs very different tasks, including streaming music, streaming video, and reading email. These tasks perform very different computing tasks. Battery life and overheating are two common problems for cell phones, so reducing power and energy consumption are critical. In this problem, we consider what to do when the user is not using the phone to its full computing capacity. For these problems, we will evaluate an unrealistic scenario in which the cell phone has no specialized processing units. Instead, it has a quad-core general purpose processing unit. Each core uses 0.5W at full use. For email-related tasks, the quad-core is 8x as fast as necessary.

1 How much dynamic energy and power are required compared to running at full power? First, suppose that the quad-core operates for 1 / 8 of the time and is idle for the rest of the time. That is, the clock is disabled for 7 / 8 of the time, with no leakage occurring during that time. Compare total dynamic energy as well as dynamic power while the core is running.

2 How much dynamic energy and power are required using frequency and voltage scaling? Assume frequency and voltage are both reduced to 1 / 8 the entire time.

3 Now assume the voltage may not decrease below 50% of the original voltage; otherwise, changes in logic state may occur (this voltage is often referred to as the voltage floor). Power can still be reduced to 1 / 8. What are the dynamic energy and power savings in this case compared to the original design at full power?

4 How much energy would be used with a dark silicon approach (compared to the original quad-core design at power full)? This involves creating specialized ASIC hardware for each major task and power gating those elements (to zero power) when not in use. Only one general-purpose core (instead of 4) would be provided, and the rest of the chip would be filled with specialized units. For email, the one core would operate for 25% of the time and be turned completely off with power gating for the other 75% of the time. During the other 75% of the time, a specialized ASIC unit that requires 20% of the energy of a core would be running.

Answer 1

I have provided a generalised solution to this problem. You may put any value to time period T, used in this solution to get another answer as per the requirement of any future problem!

TOTAL POWER P= Pd+Ps

TOTAL ENERGY E=Ed+Es // s=static, d=dynamic component

1. P=Pd+Ps

since it is given that no leakage occurs during non-operation, therefore Ps=0.

=>P=Pd=0.5W*4=2W. // since quad core has 4 processors

E=Ed+Es, Es=0 since Pd=0.

=>E=Ed=P*time.

Let total time be T seconds. Then, processor operational for only T/8 seconds.

=>E=Ed=P*(T/8)=2*T/8= T/4 joules.

Comparing with the case when processor runs for full time T;

E=Ed=P*T=2*T = 2Tjoules, which is 8 TIMES THE ENERGY CALCULATED ABOVE.

2. If voltage reduced to 1/8, power gets reduced to 1/64 of original value (since P proportional to square of V).

Thus now, Power=(1/64)*Pd = (1/64)*2 = 1/32 W.

and Energy E=Power*time = (1/32)*(T/8) = T/256 joules.

If frequency reduced to 1/8, time period increases to Tnew=8T.

Power=same=1/32W.

Energy=power*(Tnew/8)=(1/32)*T= T/32 joules.

3. if voltage reduced to 50%, and power reduced to 1/8, then;

Pnew=P/8=2/8=0.25W

Enew=Pnew*time=0.25*(T/8) = T/32 joules.

On comparison with full power, we saved 1.75W of power and {2T - T/32 = 63T/32} 63T/32 joules of energy.

4. Suppose total duration is t seconds.

Now, core operates for 0.25t and 20% of the ASIC operates for 0.75t seconds. In simple language we may say that power consumed by 20% asic is equivalent to power consumed by single core run for 1/5 times the time, viz (1/5)*0.75t=0.2*0.75t=0.15t

So effectively, core runs for 0.25t+0.15t = 0.4t seconds.

power= 0.5W = power of single core.

energy= power*time = 0.5*(0.4t) = 0.2t joules.

Observe that so much energy is saved in this case.