Question

Need it as copy text

Explain the steps involved in the design flow of field programmable gate arrays (FPGA)
using electronic design automation (EDA) tools. How the FPGA design flow differs
front the digital integrated-circuit design flow?

Answer 1

The term Electronic Design Automation (EDA) means to the tools that are used to design and verify integrated circuits (ICs), printed circuit boards (PCBs), and electronic systems, in general. Over period, these early computer aided drafting tools evolved into interactive programs that performed integrated circuit layout. Other companies like Racal-Redac, SCI-Cards, and Telesis created equivalent layout programs for printed circuit boards. These integrated circuit and circuit board layout programs became known as Computer-Aided Design (CAD) tools. The companies promoting front-end tools for schematic capture and simulation classed them as computer aided engineering (CAE). The term “automation” refers to the ability for end-users to augment, customize, and drive the capabilities of electronic design and verification tools by means of a scripting language and associated support utilities. There are a wide variety of programming languages available, but—excepting specialist application areas—the most commonly used by far are traditional C and its object-oriented offspring, C++. A gate-level netlist refers to a circuit representation at the level of individual logic gates, registers, and other simple functions. The netlist will also specify the connections (wires) between the various gates and functions. A component-level netlist refers to a circuit representation at the level of individual components. System programming languages such as C, C++, and Java are designed to allow programmers to build data structures, algorithms, and ultimately applications from the ground up.

Difference between FPGA and digital IC flow

Reconfigurable circuit. FPGAs can be reconfigured with a different design. They even have capability to reconfigure a part of chip while remaining areas of chip are still working! This feature is widely used in accelerated computing in data centres.	Permanent circuitry. Once the application specific circuit is taped-out into silicon, it cannot be changed. The circuit will work same for its complete operating life.
2	Design is specified generally using hardware description languages (HDL) such as VHDL or Verilog.	Same as for FPGA. Design is specified using HDL such as Verilog, VHDL etc.
3	Easier entry-barrier. One can get started with FPGA development for as low as USD $30.	Very high entry-barrier in terms of cost, learning curve, liaising with semiconductor foundry etc. Starting ASIC development from scratch can cost well into millions of dollars.
4	Not suited for very high-volume mass production.	Suited for very high-volume mass production.
5	Less energy efficient, requires more power for same function which ASIC can achieve at lower power.	Much more power efficient than FPGAs. Power consumption of ASICs can be very minutely controlled and optimized.
6	Limited in operating frequency compared to ASIC of similar process node. The routing and configurable logic eat up timing margin in FPGAs.	ASIC fabricated using the same process node can run at much higher frequency than FPGAs since its circuit is optimized for its specific function.
7	Analog designs are not possible with FPGAs. Although FPGAs may contain specific analog hardware such as PLLs, ADC etc, they are not much flexible to create for example RF transceivers.	ASICs can have complete analog circuitry, for example WiFi transceiver, on the same die along with microprocessor cores. This is the advantage which FPGAs lack.
8	FPGAs are highly suited for applications such as Radars, Cell Phone Base Stations etc where the current design might need to be upgraded to use better algorithm or to a better design. In these applications, the high-cost of FPGAs is not the deciding factor. Instead, programmability is the deciding factor.	ASICs are definitely not suited for application areas where the design might need to be upgraded frequently or once-in-a-while.
9	Preferred for prototyping and validating a design or concept. Many ASICs are prototyped using FPGAs themselves! Major processor manufacturers themselves use FPGAs to validate their System-on-Chips (SoCs). It is easier to make sure design is working correctly as intended using FPGA prototyping.	It is not recommended to prototype a design using ASICs unless it has been absolutely validated. Once the silicon has been taped out, almost nothing can be done to fix a design bug (exceptions apply).
10	FPGA designers generally do not need to care for back-end design. Everything is handled by synthesis and routing tools which make sure the design works as described in the RTL code and meets timing. So, designers can focus into getting the RTL design done.	ASIC designers need to care for everything from RTL down to reset tree, clock tree, physical layout and routing, process node, manufacturing constraints (DFM), testing constraints (DFT) etc. Generally, each of the mentioned area is handled by different specialist person.