In: Computer Science
Justify
the
following statements
a) Performance
of
the pipelined
processor
increases
with
increase
in the
number of
stages
.
b) Forwarding
can
eliminate
all
possible
stalls
arises
out of
data dependencies
COA ( computer organization and architecture)
a) By overlapping the execution of many separate instructions,an instruction pipeline improves a processor 's performance. Often, this is achieved by breaking the execution process of the instruction into many steps. An instruction pipeline often consists of five stages, as follows:
1. Instruction fetch (IF). Retrieval of instructions from cache
(or main memory).
2. Instruction decoding (ID). Identification of the operation to be
performed.
3. Operand fetch (OF). Decoding and retrieval of any required
operands.
4. Execution (EX). Performing the operation on the operands.
5. Write-back (WB). Updating the destination operands
b) To minimize data dependency stalls in the pipeline, operand forwarding is used. We use the interface registers present between the stages in operand forwarding to retain intermediate output such that dependent instructions can directly access new value from the interface register.
Considering the example:
I1 : ADD R1, R2, R3
I2 : SUB R4, R1, R2
Instruction / Cycle 1
2 3
4
I1
IF ID
EX DM
I2
IF
ID EX