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In: Electrical Engineering

Design a 4 to 1 demultiplexer with 2 select inputs B and A, 4 data inputs...

Design a 4 to 1 demultiplexer with 2 select inputs B and A, 4 data inputs (D3 to D0), and an output Y. You can use MultiSim with just basic gates (AND, OR, NOT, NAND, NOR, XOR), VHDL, or LabVIEW.

please I will need screenshots for the circuit and successful completion of the simulation. Thanks!

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