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Question 2 (a) The 4 common ALU flags occur in most computers. Some computers have additional...

Question 2

(a) The 4 common ALU flags occur in most computers. Some computers have additional ALU flags. For example, the x86 flag set includes P, I, and H flags, and the ARM flag set includes T, F, and I. Select two of these additional flags, and research their purpose. Indicate, if appropriate, the logic used to calculate the flag value for a given ALU operation.

(b) An ALU can be used to compare two values, by subtracting the values and consulting the flags. For example, if the two values were the same, the zero flag will be active after they are subtracted. When subtracting A-B, which flags should be active to indicate A<B and A>B for signed numbers? Justify your reasoning.

BONUS: indicate which flags should be active for unsigned comparisons A<B, A>B, A=B

Solutions

Expert Solution

Flag Register(Special purpose register) is used to contain the current state of the processor. It is 16 bits wide. Flag bits change only during arithmetic and logical operation and not for data movement operations. Some of the common flags are carry flag, zero flag, sign flag, etc.

(a) Two additional flags is P(Parity flag) and H(Half carry flag/Auxillary flag)

P flag(Parity)

The parity flag reflects the parity only of the least significant byte of the result, and is set(turns to 1) if the number of set bits of 1 is even. In simple words, it maintains odd parity.

P = 1 (if result bits have even number of 1s)

P = 0(if result bits have odd number of 1s)

Example - Suppose we have to add two numbers A=6516 and B=7F16. Let before this operation P = 0

0 1 1 0 0 1 0 1

+  0 1 1 1 1 1 1 1

1 1 1 0 0 1 0 0 (Since the result has even number of 1s, P flag changes to 1)

Thus after the operation, P = 1

H flag(Half carry)

A half-carry flag (also known as an auxiliary flag or decimal adjust flag) is a condition flag bit in the status register. It indicates when a carry or borrow is generated out of the least significant 4 bits of the accumulator register following the execution of an arithmetic instruction. It is primarily used in decimal (BCD) arithmetic instructions.

H = 1 (if carry comes out of the least significant 4 bits)

H = 0(if carry does not come out of the least significant 4 bits)

Example - Adding the decimal value 25 and 48, which are encoded as the BCD values 2516 and 4816, the binary addition of the two values produces 6D16. Since the lower nibble of this value is a non-decimal digit (D), it must be adjusted by adding 0616 to produce the correct BCD result of 7316, which represents the decimal value 73.

  0010 0101   25
+ 0100 1000   48
  0110 1101   6D, temporary result
+      0110   06, adjustment (since carry came out of the least significant 4 bits, H=1)
  0111 0011   73, adjusted result

(b) When subtracting A-B, to indicate A<B and A>B for signed numbers, Sign flag(SF) and Overflow flag(OF) are activated.

if A>B (SF == OF)

if A<B (SF!=OF)

The compare CMP instructions perform a subtract.
If A != B and both operands have the same sign then obviously the following will happen (assume dword operands).

 100 -  200 = -100 (sign change OF=1 + SF=1, ergo A(100) < B(200)).
-100 - -200 =  300 (sign change OF=1 + SF=0, ergo A(-100) > B(-200)).

If A and B have different signs than the following will happen.

-100 - 100 = -200 (no sign change, SF=1, OF=0, A < B)
100 - -100 = 200  (no sign change, SF=0, OF=0, A > B)

That's all possible scenario's with OF+SF covered.
As you can see A > B only when SF <> OF and A < B only when SF = OF.

BONUS :

For unsigned comparisions, Zero flag and Carry Flag should be activated.

Flag changes :---

Z (zero flag)   C(carry flag)

1 0 (if A=B, where A is the number present in the accumulator)

0   1 (if A<B)

0 0 (if A>R)


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