Question

1. For a single cycle computer system, how to calculate the cycle time based on with/without pipeline? CPI (Cycle per instruction), there is standard formula equation, please explain it
2. What about multi-cycle systems?

3. For currently, do the instruction sets used for quantum computer use pipeline design?

Answer 1

Ans 1:  An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle of a computer. It is the process by which a computer retrieves a program instruction from its memory, determines what actions the instruction requires, and carries out those actions. This cycle is repeated continuously by the central processing unit (CPU), from bootupto when the computer is shut down. enter image description here Block diagram of Interrupt Cycle After the execute cycle is completed, a test is made to determine if an interrupt was enabled (e.g. so that another process can access the CPU) If not, instruction cycle returns to the fetch cycle If so, the interrupt cycle might performs the following tasks: (simplified...) move the current value of PC into MBR move the PC-save-address into MAR move the interrupt-routine-address into PC move the contents of the address in MBR into indicated memory cell continue the instruction cycle within the interrupt routine after the interrupt routine finishes, the PC-save-address is used to reset the value of PC and program execution

Ans 2: A multi-cycle processor is a processor that carries out one instruction over multiple clock cycles, often without starting up a new instruction in that time (as opposed to a pipelined processor).

Ans 3: Yes, the instruction sets are used for quantum computer in pipeline design