In: Electrical Engineering
HSC12 Microcontroller
To create a delay using the Output Compare Channel 6, we add a number of cycles (CCOUNT)to TC6 and then wait until TCNT is equal to TC6. This happens when TLFG1(6) =1. Assuming an E-clock of 24 MHz: Complete the following table in order to generate the given delays:
CCOUNT |
Prescaler |
Delay |
1 us |
||
100 us |
||
500 us |
||
2 ms |
||
80 ms |
||
300ms |
Timer advances after each clock cycle and it is 16-bit timer which means it can only count up to 65536
For getting delays grater than 65536*tclk ,we can use prescaler
Delay can be calculted as follows
Lets find out,what delay can max count genrate with prescalar as '1'
So upto 2.730 milli Seconds prescalar of '1' is enough
For prescaler 2,4,8,16,32,64,128 and full count delays will be
Prescalar should be chosen such that required delay should be just less that max count delay,only tthen delay will be more accurate.
For 80msec prescaler 32 should be chosen
For 300msec prescaler 128 should be chosen
Delay | Prescalar | CCount |
---|---|---|
1us | 1 | 24 |
100us | 1 | 2400 |
500us | 1 | 12000 |
2ms | 1 | 48000 |
80ms | 32 | 60000 |
300ms | 128 | 56250 |