Question

Hi, I'm having trouble understanding "symbolic microprogram" in Computer Organization and Architecture 2. Can someone please solve any example and explain it in details so I can understand it? Thank you in advance.

NOTE: Please use Computer System Architecture (3rd edition)

Answer 1

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Symbolic Microinstruction :

The execution of the third (MAP) microinstruction in the fetch routine results in a branch to address Oxxxx00, where xxxx are the four bits of the operation code.

For example, if the instruction is an ADD instruction whose operation code is 0000, the MAP microinstruction will transfer to CAR the address 0000000 which is the start address for the ADD routine in control memory.

The first address for the BRANCH and STORE routines are 0000100 decimal 4) and 0001000 decimal 8), respectively.

The first address for the other 13 routines are at address values 12162060 This gives four words in control memory for each routine.

In each routine we must provide microinstructions for evaluating the effective address and for executing the instruction. The indirect address mode is associated with all memory-reference instructions. A saving in the number of control memory words may be achieved if the microinstructions for the indirect address are stored as a subroutine.

This subroutine, symbolized by INSECT, is located right after the fetch routine. The table also shows the symbolic microprogram for the fetch routine and the microin struction routines that execute four computer instructions.

To see how the transfer and return from the indirect subroutine occurs,

assume that the MAP microinstruction at the end of the fetch routine caused a branch to address 0, where the ADD routine is stored.

The first microinstruc tion in the ADD routine calls subroutine INDIRECT, conditioned on status bit I. IfI = 1, a branch to INDIRECT occurs and the return address (address 1 in this case) is stored in the subroutine register SBR. The INDIRECT subroutine has two microinstructions

INDIRECT:

READ U JMP NEXT

DRTAR U RET

Remember that an indirect address considers the address part of the instruction as the address where the effective address is stored rather than the address of the operand. Therefore, the memory has to be accessed to get the effective address, which is then transferred to AR. The return from subroutine (RET) transfers the address from SBR to CAR, thus returning to the second microinstruction of the ADD routine.

The execution of the ADD instruction is carried out by the microinstruc tions at addresses 1 and 2.

The first microinstruction reads the operand from memory into DR. The second microinstruction performs an add microopera tion with the content of DR and AC and then jumps back to the beginning of the fetch routine.

The BRANCH instruction should cause a branch to the effective address.