In: Computer Science
It takes 1 nanosecond (1 x 10-9 s) to move a word from L1 cache to the registers and 10 nanoseconds to move a word from L2 cache to the registers. Assuming that all of the words that are not in L1 cache are in L2 cache, what is the percentage reduction in the time it takes to get the 24,000 words of data into the registers if the hit rate is increased from 95% to 97%? Round your answer to the nearest tenth of a percent. Hint: Start by calculating the time to load the words available from L1 cache plus the time to load those from L2 cache, for each hit rate.
Solution
95% L1 Hit and 5% Miss
95% of 24000 (L1 Hit) = 0.95x24000 = 22,800
5% of 24000 (L1 Miss or L2 Hit) = 0.05x24000 = 1200
Time required to move 22,800 words from L1 cache to registers = 22,800 x 1 nanosec = 22,800 nsec
Time required to move 1200 words from L2 cache to registers = 1200 x10 nanosec = 12000 nsec
Total Time required = 22,800 + 12,000 = 34, 800 nsec
97% L1 Hit and 3% Miss
97% of 24,000 (L1 Hit) = 0.97 x 24000 = 23, 280
3% of 24,000 (L1 Miss or L2 Hit) = 0.03 x 24000 = 720
Time required to move 23,280 words from L1 cache to registers = 23,280 x 1 nanosec = 23, 280 nsec
Time required to move 720 words from L2 cache to registers = 720 x 10 nsec = 7200 nsec
Total Time required = 23, 280 + 7200 = 30, 480 nsec
Time Reduction if the L1 hit rate is increased to 97% (from 95%) = 34,800 - 30,480 = 4,320 nsec
Time Reduction (%) = (4,320 / 34,800) x 100 = 12.414%
After Rounding to Nearest 10th of Percent (Time Reduction %) = 12.4%