Question

In: Electrical Engineering

A computer architect needs to design the pipeline of a new microprocessor. She has an example...

A computer architect needs to design the pipeline of a new microprocessor. She has an example program with 5x10^7 instructions. Each instruction takes 8ns to finish.

a. How long does it take to execute this program on a non-pipelined processor?

b. The current state-of-the-art microprocessor has about 12 pipeline stages. Assume it is perfectly pipelined. How much speedup will it achieve compared to the non-pipelined processor?

c. Real pipelining isn’t perfect since implementing pipelining introduces some overhead per pipeline stage. Will this overhead affect instruction latency, instruction throughput, or both?

Solutions

Expert Solution

Given that the number of instructions in the example program = 5*10^7 instructions.

Time taken by each instruction = 8ns

a) In non pipelined processors each instruction starts executing after previous instruction completes. So it takes time of (total instruction count*8ns) i.e., 5*10^7*8ns = 2/5 sec = 0.4 sec.

So in non pipelined processor it takes 0.4sec to execute all instructions.

b) It is a pipelined processor and has 12pipeline stages. Also stated that it is perfectly pipelined.

For the first instruction only it takes 8 ns. From next onwards each takes (8/12) ns i.e., 0.666ns.

So the total time taken is 8ns +[(instruction count -1) *0.666]ns.

8ns + [(5*10^7 - 1) *0.666]ns = 0.0333 sec.

So in pipelined processing it takes 0.0333sec to execute all instructions.

Speedup is the number of times it is faster. It is given by 0.4/0.0333 = 11.999~= 12.

It is 12 times faster compared to non pipelined processor.

C) The overheads occur in pipelining affects both latency and throughput. The instruction may need to take more stages hence latency is affected. Also the time taken between any two instructions to execute may vary as a result. So throughput is also affected. Hence both are affected due to overheads occur in pipelining.


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