In: Electrical Engineering
Create a PLA, that implements the following functions: F1 = ∑(0, 3, 5, 9) F2 = ∑(1, 4, 8, 12) F3 = ∑(1, 5, 15) F4 = ∑(2, 5, 9, 13, 14)
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Given Functions are:
F1 = ∑(0, 3, 5, 9)
F2 = ∑(1, 4, 8, 12)
F3 = ∑(1, 5, 15)
F4 = ∑(2, 5, 9, 13, 14)
A PLA is a Programmable Logic Array which has programmble AND gates and Programmable OR gates.
Step1:
Reduction of the given functions using Kmap
for F1,we get


For F2,we get


For F3,we get


For F4,we get


Step2:
Implementation using a PLA
Total number of input buffers are 4,because we have four varibles,
Total number of AND gates are equal to minterms i.e. 13.
Total number of OR gates equal to the total number of functions i.e. 4.
