In: Computer Science
A) Name and explain the flag registers of 8086?
B) Explain the Shift instruction? Name it’s types and explain only one of them?
C) Explain addressing decoding using 3- to 8- line decoder ?
NOTE: In part C give the reason why we do address decoding and then explain the processes.
A) The flag register is the special purpose register which can be used to toggle it's value from 0 to 1 and 1 to 0 depemding upon the value of the result obtained after arithmetic or logical operations.
In 8086, we have 16-bit flag registers in which 9 are valid flag bits.
The fformat of flag registers are as follows:
Further one can divide these 9 valid flag bits int 2 parts as: status flags(S,Z,AC,P,CY,O) and control flags(D,I,T).
Status flags are used to set the flag after some arithmetic or logical operations.
S - After any operation if the MSB is 1, then it indicates that the number is negative. And this flag is set to 1
Z - If the total register is zero, then only the Z flag is set
AC - When some arithmetic operations generates carry after the lower half and sends it to upper half, the AC will be 1
P - This is even parity flag. When result has even number of 1, it will be set to 1, otherwise 0 for odd number of 1s
CY - This is carry bit. If some operations are generating carry after the operation this flag is set to 1
O - The overflow flag is set to 1 when the result of a signed operation is too large to fit.
And control flags are used to enable or disable the basic operations of the x86 microprocessor.
D - This is directional flag. This is used in string related operations. D = 1, then the string will be accessed from higher memory address to lower memory address, and if D = 0, it will do the reverse.
I - This is interrupt flag. If I = 1, then MPU will recognize the interrupts from peripherals. For I = 0, the interrupts will be ignored
T - This trap flag is used for on-chip debugging. When T = 1, it will work in a single step mode. After each instruction, one internal interrupt is generated. It helps to execute some program instruction by instruction.
B) Shift operations involves moving of the bits in a word to the left or to the right.
The purpose of shift instructions is to shift an operand, bit by bit, to the right or to the left. Direction of shift i.e., either left to right or right to left depemds upon the specific shift instruction.
In shift-left operations, zeros are shifted into low-order vacated positions.
In shift-right operations, bits shifted can be:
- zeros (logical shift right - SRA instruction)
- original value of the sign bit (arithmetic right shift - SRT instruction)
- bits that are shifted out of the low-order position (RTE instruction)
TYPES :
Ther are 3 types of shift instructions:
1. Logical shift instructions -
a. SHL(shift left)
b. SHR (shift right)
2. Arithmetic shift instructions -
a. SAL (shift arithmetic left)
b. SAR (shift arithmetic right)
3. Double precision shift instructions -
a. SHLD (double precision shift left)
b. SHRD (double precision shift right)
Logical Shift instructions:
SHL - It shifts the leftmost bit into the Carry Flag (CF) and overwrites the current value of the Carry Flag.
Each of the remaining bits is shifted leftwise and 0 is shifted into the rightmost bit.
For example,
mov AL, 3
shl AL, 1
This shifts left, AL by 1 place
AL - 00000011 (initially)
Al - 00000110 (after logical left shift)
SHR - It hifts the rightmost bit of operand into the Carry Flag; the current value of the Carry Flag is lost.
Each of the remaining bits is shifted rightwise and 0 is shifted into the leftmost bit of operand.
NOTE - SHR does not preserve the sign of a negative operand. Thus, SHR cannot be used to perform division on negative numbers.
For example,
mov BL , 00000101
shr BL , 1
BL - 00000101 (initially)
BL - 00000010 (after logical right shift)
C) An address decoder is a binary decoder that has two or more inputs for addressbits and one or more outputs for device selection signals.
Address decoding is the way a computer decodes the address on the address bus to selsct the memory locations in one or more memory or peripheral devices.
3 to 8 line decoder is a combinational circuit that can be used as both a decoder and a demultiplexer which can be used for for address decoding.
Here input or select lines are connected to the address bus of the system and the output can be connected to CS lines of 8Kx8 EPROM which finally give the output of the decoder to the data bus.