Question

Describe the indirect indexed addressing modes of CPU12. Illustrate with detailed examples of all addressing modes.

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1- An Explanation:

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2- An example:

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Answer 1

The CPU12 is a high-speed, 16-bit processing unit. It has full 16-bit data paths and internal registers for high-speed extended math instructions. The instruction set is a proper superset of the M68HC11 instruction set. The CPU12 allows instructions with odd byte counts, including many single-byte instructions. This provides efficient use of ROM space. An instruction pipe buffers program information so the CPU always has immediate access to at least three bytes of machine code at the start of every instruction. The CPU12 also offers an extensive set of indexed addressing capabilities. The HCS12 includes new instructions and addressing modes to support high level languages.

There are a number of features included in the HCS12 CPU for efficiently implementing code that is written in a high-level language. CPU12 has a full set of 8 and 16-bit mathematical instructions such as 16x16 signed and unsigned multiplies and divides. CPU12 also includes a set of efficient fuzzy logic instructions, and table lookup and interpolate. It also includes many instruction that support looping construct.

Indirect addressing Modes:

Accumulators (A,B,D): They are used to hold the operands and results of arithmetic calculations or data manipulations. A and B are two 8-bit accumulators, while D is a rich set of 16-bit operations that uses the concatenation of A:B as a 16-bit accumulator.

Index Register: Index registers X and Y are used for the indexed addressing mode. They are useful for data movement and in cases where operands from two separate tables are involved in calculation. For indexed mode operations, an 8-bit positive unsigned offset in the object code is added to the present contents of X or Y. This forms the address for an operand. Y-index instructions are slightly less efficient than X because of prebyte before opcode. However, it’s better than changing temps into a single index register. It is common to load one of the index registers with the beginning address of the internal register space (usually $0000). This allows indexed addressing mode to be used to access any of the internal I/O and control regs.

Stack Pointer (SP): A 16-bit stack pointer (SP) implies that stack can be any size and anywhere in the 64K map. Normally, the stack pointer is initialized by one of the very first instructions in the program. Each time a byte is pushed onto the stack, the stack pointer is first decremented so that it always points to last byte pushed.

Program Counter (PC): , a 16-bit register, that points to program memory. It holds the address of the next instruction to be executed. The PC can also reference data spaces with available CPU12 new addressing modes.

Condition Code Register (CCR) contains 5 status indicators, 2 interrupt masking bits, and a STOP instruction disable bit.

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