In: Electrical Engineering
(A) Minimize the following Boolean expression as much
as possible and Design the obtained function with NAND universal
logic gates
Y = AB + A(B+C) + B (B+C)
(B) Design a logic gate circuit diagram ( combination circuit ) that accepts a 3 - bit BCD number and generates an output binary number equal to the square of input number.
A.ans- Here we can simplify Y following way.We can also simplify by K-map, final expression would be same.
B.ans.--- so to understand i will use first the same discrete design.Now we know the necessary boolean expression for the given problem.so we will realize it using decoder