Question

From "Digital Electronics a practical approach with VHDL" by William Kleitz 9th edition. FPGA question C10-6.The VHDL problem in Figure 10-42(a) is the implementation of a J-K flip-flop.

(a) Make the necessary program additions to provide active-LOW asynchronous Set and Reset. Save this program as prob_c10_6.vhd.

Answer 1

In the above table Reset_bar Has the Highest priority than Set_bar

//////////The VERILOG code shown below///////////////////

module jkffasync(J,K,SET_N, RST_N,Qout);

    input J,K,SET_N, RST_N; // this is inputs
    input Clk; //clock
    output Qout; //output (Q)
    reg Qout;
  
always@ (posedge(Clk) or negedge(RST_N) or negedge(SET_N))
    begin
      if(RST_N == 0) //This signal has high priority.
            Qout = 0;
        else  
          if(SET_N == 0) //This signal set has next priority
                Qout = 1;
            else
              
                 if(J == 0 && K == 0)  
                    Qout = Qout;      //no change state
                 else if(J == 0 && K == 1)
                    Qout = 0;         //// //reset state
                 else if(J == 1 && K == 0)
                    Qout = 1;         ////////set state
                 else
                    Qout = ~Qout;      //TOGGLE the previous output
            
    end
  
endmodule

--------VHDL CODE---

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity jkffasync_rst_set is
port ( clk:     in std_logic;
          J, K:               in std_logic;
          Q, Qbar:       out std_logic;
          RST_N,SET_N:              in std_logic
);
end jkffasync_rst_set ;

architecture Beh of jkffasync_rst_set is

signal qtmp,qbartmp : std_logic :='0';
begin

process(clk,RST_N,SET_N)
begin
   if(RST_N = '1') then        
    qtmp <= '0';
    qbartmp <= '1';
    elsif(SET_N = '1') then         
    qtmp <= '0';
    qbartmp <= '1';
   elsif( rising_edge(clk) ) then
      if(J='0' and K='0') then   
       NULL;
      elsif(J='0' and K='1') then
       qtmp <= '0';
       qbartmp <= '1';
       elsif(J='1' and K='0') then  
       qbartmp <= '0';
       else                       
       qtmp <= not qtmp;
       qbartmp <= not qbartmp;
      end if;
   end if;
end process;
Q <= qtmp;
Qbar <= qbartmp;

end Beh;

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